DESIGN METHODOLOGIES AND CAD TOOLS

An analysis of commercial VLSI chips shows that the integration density, computed with a normalization, decreased significantly over the last ten years. In our opinion, design automation is the main cause of this degradation. The importance of a well defined design methodology is often underestimated. Sometimes it happens that mismatches occur between the used CAD tools and design methodologies. In this paper, design methodologies and CAD tools for complex VLSI chips will be discussed. It will be stressed that the suppression of abstraction levels in a design methodology will lead to conceptually simple methodologies. As a result, the corresponding CAD tools will be more efficient. RISC machines have been taken as a typical example where an abstraction level has been suppressed at the behavioural description level. Another example is discussed for the structural description level. The proposed floor plan oriented methodology suppresses two levels. Finally the physical description is discussed by making a classification of the different layout techniques. It is shown that procedural symbolic layout techniques can be advantageously employed for in slices decomposable structures in a floor plan oriented methodology.