SIMPLE EQUIDISTANT FIRING DELAY SCHEME FOR 3-PHI THYRISTOR CONVERTERS

被引：6

作者：

BHAT, SAK ^{[1
]}

VITHAYATHIL, J ^{[1
]}

机构：

[1] INDIAN INST SCI, DEPT ELECT ENGN, BANGALORE 560012, INDIA

来源：

INTERNATIONAL JOURNAL OF ELECTRONICS | 1979年 / 47卷 / 02期

关键词：

D O I：

10.1080/00207217908938625

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A simple firing delay circuit for 3- phi fully controlled bridge using a phase locked loop is described. The circuit uses very few components and is an improved scheme over the existing methods. The use of this circuit in three-phase thyristor converters and 'circulating current free' mode dual converters is described.

引用

页码：139 / 145

页数：7

共 4 条

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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS AND CONTROL INSTRUMENTATION, 1975, 22 (03) :425-429

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