A VLSI ARCHITECTURE FOR THE ALTERNATIVE SUBSAMPLING-BASED BLOCK MATCHING ALGORITHM

被引：9
|
作者：
JUNG, HK [1 ]
HONG, CP [1 ]
CHOI, JS [1 ]
HA, YH [1 ]
机构：
[1] TAEGU UNIV,DEPT COMP SCI,KYUNGPOOK 713714,SOUTH KOREA
来源：
IEEE TRANSACTIONS ON CONSUMER ELECTRONICS | 1995年 / 41卷 / 02期
关键词：
D O I：
10.1109/30.391351
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A VLSI architecture of the block matching algorithm based on the alternative subsampling method for motion estimation is proposed. The alternative subsampling method reduces the computational complexity by alternatively subsampling the number of pixels within the blocks used to estimate motion vectors, whereas conventional methods limit the number of locations searched. Simulation results show that the performance of this method is very close to full search algorithm For subsampling factor of N, this approach can achieve approximately N/2 times of calculation with additional small overhead associated with address generator and temporary buffer. In addition, this architecture has about a half silicon area compared to Yang's architecture.
引用
收藏
页码：239 / 247
页数：9
相关论文
共 50 条
  • [1] A bandwidth efficient subsampling-based block matching architecture for motion estimation
    Chin, Hao-Yun
    Cheng, Chao-Chung
    Lin, Yu-Kun
    Chang, Tian-Sheuan
    ASP-DAC 2005: PROCEEDINGS OF THE ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2, 2005, : D7 - D8
  • [2] QME: An efficient subsampling-based block matching algorithm for motion estimation
    Lee, KB
    Chin, HY
    Hsu, HC
    Jen, CW
    2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 2, PROCEEDINGS, 2004, : 305 - 308
  • [3] Block-matching algorithm based on hardware implementation and its VLSI architecture
    Zhao, Bo
    Du, Jian-Chao
    Yan, Yao-Ping
    Xi'an Dianzi Keji Daxue Xuebao/Journal of Xidian University, 2003, 30 (02): : 160 - 164
  • [4] VLSI Architecture for Block-Matching Motion Estimation Algorithm
    Hsieh, Chaur-Heh
    Lin, Ting-Pang
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY, 1992, 2 (02) : 169 - 175
  • [5] Attacking subsampling-based watermarking
    Lu, W
    Lu, HT
    Chung, FL
    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 2005, E88A (11): : 3239 - 3240
  • [6] VLSI architecture for motion estimation using the block-matching algorithm
    Sanz, C
    Garrido, MJ
    Meneses, JM
    EUROPEAN DESIGN & TEST CONFERENCE 1996 - ED&TC 96, PROCEEDINGS, 1996, : 310 - 314
  • [7] Subsampling-based wavelet watermarking algorithm using Support Vector Regression
    Fu, Gaoding
    Peng, Hong
    EUROCON 2007: THE INTERNATIONAL CONFERENCE ON COMPUTER AS A TOOL, VOLS 1-6, 2007, : 291 - 294
  • [8] An efficient and reconfigurable VLSI architecture for different block matching motion estimation algorithm
    Zhang, XD
    Tsui, CY
    1997 IEEE INTERNATIONAL CONFERENCE ON ACOUSTICS, SPEECH, AND SIGNAL PROCESSING, VOLS I - V: VOL I: PLENARY, EXPERT SUMMARIES, SPECIAL, AUDIO, UNDERWATER ACOUSTICS, VLSI; VOL II: SPEECH PROCESSING; VOL III: SPEECH PROCESSING, DIGITAL SIGNAL PROCESSING; VOL IV: MULTIDIMENSIONAL SIGNAL PROCESSING, NEURAL NETWORKS - VOL V: STATISTICAL SIGNAL AND ARRAY PROCESSING, APPLICATIONS, 1997, : 603 - 606
  • [9] Erratum to: A fast VLSI architecture of a hierarchical block matching algorithm for motion estimation
    Kausik Ghosh
    Anindya Sundar Dhar
    Journal of Real-Time Image Processing, 2016, 11 : 47 - 47
  • [10] VLSI ARCHITECTURE FOR A FLEXIBLE BLOCK MATCHING PROCESSOR
    DEVOS, L
    SCHOBINGER, M
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY, 1995, 5 (05) : 417 - 428
12345