AT2-OPTIMAL GALOIS FIELD MULTIPLIER FOR VLSI

被引:4
作者
FURER, M [1 ]
MEHLHORN, K [1 ]
机构
[1] UNIV SAARLAND,DEPT APPL MATH & COMP SCI,D-6600 SAARBRUCKEN,FED REP GER
关键词
D O I
10.1109/12.29475
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
引用
收藏
页码:1333 / 1336
页数:4
相关论文
共 19 条
[1]   INFORMATION-TRANSFER AND AREA-TIME TRADEOFFS FOR VLSI MULTIPLICATION [J].
ABELSON, H ;
ANDREAE, P .
COMMUNICATIONS OF THE ACM, 1980, 23 (01) :20-23
[2]  
Aho A. V., 1974, DESIGN ANAL COMPUTER
[3]   LOG DEPTH CIRCUITS FOR DIVISION AND RELATED PROBLEMS [J].
BEAME, PW ;
COOK, SA ;
HOOVER, HJ .
SIAM JOURNAL ON COMPUTING, 1986, 15 (04) :994-1003
[4]  
BERLEKAMP ER, 1968, ALGEBRAIC CODING THE
[5]   THE AREA-TIME COMPLEXITY OF BINARY MULTIPLICATION [J].
BRENT, RP ;
KUNG, HT .
JOURNAL OF THE ACM, 1981, 28 (03) :521-534
[6]  
FURER M, 1985, UNPUB
[7]   SUBLINEAR PARALLEL ALGORITHM FOR COMPUTING THE GREATEST COMMON DIVISOR OF 2 INTEGERS [J].
KANNAN, R ;
MILLER, G ;
RUDOLPH, L .
SIAM JOURNAL ON COMPUTING, 1987, 16 (01) :7-16
[8]  
MacWilliams F., 1978, THEORY ERROR CORRECT, Vsecond
[9]   AT2-OPTIMAL VLSI INTEGER DIVISION AND INTEGER SQUARE ROOTING [J].
MEHLHORN, K .
INTEGRATION-THE VLSI JOURNAL, 1984, 2 (02) :163-167
[10]   AREA-TIME OPTIMAL DIVISION FOR T=OMEGA((LOG-N)1+EPSILON) [J].
MEHLHORN, K ;
PREPARATA, FP .
INFORMATION AND COMPUTATION, 1987, 72 (03) :270-282