A high-linearity and high-resolution delay line structure with a calibration algorithm in delay-based LINC transmitters

被引：1

作者：

Han Yue ^{[1
]}

Qiao Shushan ^{[1
]}

Hei Yong ^{[1
]}

机构：

[1] Chinese Acad Sci, Inst Microelect, Beijing 100029, Peoples R China

来源：

JOURNAL OF SEMICONDUCTORS | 2016年 / 37卷 / 01期

关键词：

linear amplification with non-linear components (LINC); delay line; linearity; resolution;

D O I：

10.1088/1674-4926/37/1/015003

中图分类号：

O469 [凝聚态物理学];

学科分类号：

070205 ;

摘要：

In order to overcome the bottleneck of low linearity and low resolution, an improved delay line structure is proposed with a calibration algorithm to conquer PVT (process, voltage and temperature) variations for an all-digital design. The chip is implemented in 0.13 mu m CMOS technology. Measurement results show that the proposed structure with the calibration algorithm can evidently improve the linearity and resolution of the delay line. The delay resolution is 2 ps and the root mean square jitter of the delay is 4.71 ps, leading to an error vector magnitude enhancement of 1.32 dB.

引用

页数：7

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