AN EFFICIENT, PARALLEL-SYMMETRIC THINNING ALGORITHM AND ITS HARDWARE IMPLEMENTATION

被引:0
|
作者
BOURBAKIS, NG
JANG, W
机构
[1] COMP TECHNOL INST,PATRAS,GREECE
[2] GEORGE MASON UNIV,DEPT ELECT & COMP ENGN,FAIRFAX,VA 22030
来源
MICROPROCESSING AND MICROPROGRAMMING | 1988年 / 23卷 / 1-5期
关键词
COMPUTER HARDWARE;
D O I
10.1016/0165-6074(88)90342-0
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents an efficient, parallel-symmetric thinning algorithm (PSTA), which is a modification of the one-pass thinning algorithm (OPTA), and its hardware implementation. The OPTA algorithm is applied on raster scanned binary images, using a set of 10 thinning patterns of 3 multiplied by 3 and 3 multiplied by 4 predefined elements, and produces the skeleton of their objects. The OPTA hardware implementation has been done using a combinatorial circuit. Both the PSTA and OPTA algorithms are implemented sequentially in software for comparison purpose in accuracy (using ideal skeletons), memory requirements and execution time. The hardware implementation of the PSTA is also provided using a 2-D hardware processing array.
引用
收藏
页码:115 / 121
页数:7
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