PERFORMANCE ANALYSIS OF MR-1, A CLUSTERED SHARED-MEMORY MULTIPROCESSOR

Clustered shared-memory multiprocessors represent an attractive alternative to single-level bus-based systems. By using knowledge about the privacy of data variables, a compiler can reduce run-time contention for shared resources, such as a global memory, by relocating data to processors′ local memory and shared cluster memory. This paper introduces the architecture of the MR-1 multiprocessor, a clustered, shared-memory multiprocessor architecture. A performance analysis of the architecture is performed using both queueing and nonqueueing models. Subsequent simulation reveals the accuracy of each model under certain conditions. We deal with issues of cost, performance, and scalability by comparing the MR-1 communication architecture with two alternatives. © 1994 Academic Press, Inc.