共 50 条
- [31] Output Hazard-Free Transition Delay Fault Test Generation 2009 27TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 2009, : 97 - +
- [32] Hazard-free treatment and resource utilisation of electrolytic manganese residue: A review Liu, Zhihong (zhliu@csu.edu.cn), 1600, Elsevier Ltd (306):
- [33] Hazard-free self-timed design: Methodology and application to asynchronous routing in an heterogeneous parallel machine JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 1999, 22 (03): : 197 - 215
- [34] Hazard-Free Self-Timed Design: Methodology and Application to Asynchronous Routing in an Heterogeneous Parallel Machine Journal of VLSI signal processing systems for signal, image and video technology, 1999, 22 : 197 - 215
- [35] An implicit method for hazard-free two-level logic minimization ADVANCED RESEARCH IN ASYNCHRONOUS CIRCUITS AND SYSTEMS - FOURTH INTERNATIONAL SYMPOSIUM, 1998, : 58 - 69
- [36] Synthesis of hazard-free customized CMOS complex-gate networks under multiple-input changes 33RD DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 1996, 1996, : 77 - 82
- [37] The Hazard-Free Superscalar Pipeline Fast Fourier Transform Architecture and Algorithm VLSI-SOC: ADVANCED TOPICS ON SYSTEMS ON A CHIP, 2009, 291 : 227 - 248
- [39] DEVELOPMENT OF A LOW-POWER, HAZARD-FREE T-GATE IEE PROCEEDINGS-E COMPUTERS AND DIGITAL TECHNIQUES, 1982, 129 (04): : 165 - 168
- [40] Output hazard-free transition tests for silicon calibrated scan based 24TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 2006, : 349 - +