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- [2] A MASSIVELY-PARALLEL FAULT-TOLERANT ARCHITECTURE FOR TIME-CRITICAL COMPUTING JOURNAL OF SUPERCOMPUTING, 1995, 9 (1-2): : 135 - 162
- [3] On- Demand Fault-Tolerant Loop Processing on Massively Parallel Processor Arrays PROCEEDINGS OF THE ASAP2015 2015 IEEE 26TH INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS, 2015, : 194 - 201
- [5] A Fault Tolerant Implementation for a Massively Parallel Seismic Framework 2020 IEEE HIGH PERFORMANCE EXTREME COMPUTING CONFERENCE (HPEC), 2020,
- [6] Analysis of topologies of massively parallel processing architecture Dianzi Keji Daxue Xuebao/Journal of University of Electronic Science and Technology of China, 1994, 23 (06):
- [7] Massively parallel heterogeneous VLSI architecture for MSIMD processing International Workshop on Algorithms and Parallel VLSI Architectures, 1991,
- [8] A RISC CENTRAL PROCESSING UNIT FOR A MASSIVELY PARALLEL ARCHITECTURE MICROPROCESSING AND MICROPROGRAMMING, 1990, 30 (1-5): : 33 - 39
- [9] From massively parallel image processors to fault-tolerant nanocomputers PROCEEDINGS OF THE 17TH INTERNATIONAL CONFERENCE ON PATTERN RECOGNITION, VOL 3, 2004, : 2 - 7