共 14 条
[1]
A novel design of low power and high read stability Ternary SRAM (T-SRAM), memory based on the modified Gate Diffusion Input (m-GDI) method in nanotechnology
[J].
MICROELECTRONICS JOURNAL,
2016, 58
:44-59
[3]
Cho G, 2011, INTEGR VLSI J, V54, P97
[5]
Ghanatghestani M. Mohammadi, 2015, J COMPUT THEOR NANOS, V12, P1, DOI DOI 10.1166/JCTN.2015.4546
[6]
Noise Margin-Optimized Ternary CMOS SRAM Delay and Sizing Characteristics
[J].
53RD IEEE INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS,
2010,
:801-804
[9]
Low-power fast (LPF) SRAM cell for write/read operation
[J].
IEICE ELECTRONICS EXPRESS,
2011, 8 (18)
:1473-1478