A MONOLITHIC CMOS 20-B ANALOG-TO-DIGITAL CONVERTER

This paper presents a monolithic 20-b analog-to-digital converter (ADC) based on an oversampling feedback architecture [1], [2]. The converter consists of a time-continuous integrator at the input, a pulsewidth modulator in the forward branch of the loop (corresponding to a 10-b ADC), and a 1-b DAC to generate the feedback voltage. The digital evaluation is carried out with a uniform-weighted rectangular window filter. The circuit is implemented in a standard 2-mu-m CMOS n-well process and requires 14 mm2 of silicon, including the pads. Measurement results are presented that demonstrate the feasibility of this architecture for 20-b accuracy. The complete circuit has a power consumption of 6.7 mW.