共 50 条
[41]
Hardware implementation of genetic algorithms for VLSI design
[J].
COMPUTER APPLICATIONS IN INDUSTRY AND ENGINEERING,
2002,
:197-200
[44]
Design and implementation of HDTV bit-stream construction unit
[J].
Shuju Caiji Yu Chuli/Journal of Data Acquisition and Processing,
2002, 17 (04)
[45]
Design and implementation of multipattern generators in analog VLSI
[J].
IEEE TRANSACTIONS ON NEURAL NETWORKS,
2006, 17 (04)
:1025-1038
[46]
High throughput bandwidth optimized VLSI design for motion compensation in AVS HDTV decoder
[J].
Journal of Zhejiang University-SCIENCE A,
2008, 9
:822-832
[47]
Design and implementation of twin transport stream demultiplexor in HDTV decoder
[J].
ASICON 2007: 2007 7TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS,
2007,
:729-732
[48]
Design and implementation of HDTV encoder system with parallel processing architecture
[J].
ICCS 2002: 8TH INTERNATIONAL CONFERENCE ON COMMUNICATIONS SYSTEMS, VOLS 1 AND 2, PROCEEDINGS,
2002,
:722-726
[50]
High throughput bandwidth optimized VLSI design for motion compensation in AVS HDTV decoder
[J].
JOURNAL OF ZHEJIANG UNIVERSITY-SCIENCE A,
2008, 9 (06)
:822-832