A STUDY OF LOW-VOLTAGE OPERATION SRAM

被引：0

作者：

YAMAGUCHI, T

MATTHEWS, F

SATO, N

UEOKA, J

NATSUME, H

MITANI, H

机构：

来源：

NEC RESEARCH & DEVELOPMENT | 1995年 / 36卷 / 01期

关键词：

SRAM; WORD BOOST; STATIC NOISE MARGIN (SNM); LOW VOLTAGE OPERATION; SYMMETRICAL CELL; V-CCMIN;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A low voltage operation 1 Mbit SRAM with a polysilicon resistor load memory cell has been developed. This SRAM adopts a new boost circuit which operates continuously for both write and read operation at the optimized boost-level. An access time of 225 ns at V-cc = 1.6 V is achieved. This paper also describes the minimum operating voltage (V-ccmin) dependence on the threshold voltage and cell ratio of the symmetrical memory cell.

引用

页码：64 / 71

页数：8