LOGIC DESIGN OF PROGRAMMABLE LOGIC-ARRAYS

被引：0

|

作者：

KAMBAYASHI, Y ^{[1
]}

机构：

[1] KYOTO UNIV,DEPT INFORMAT SCI,KYOTO 606,JAPAN

来源：

IEEE TRANSACTIONS ON COMPUTERS | 1979年 / 28卷 / 09期

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

引用

收藏

页码：609 / 617

页数：9

相关论文

共 50 条

[1] LOGIC DESIGN OF DECODED-PROGRAMMABLE LOGIC-ARRAYS
XIAO, YX
INTERNATIONAL JOURNAL OF ELECTRONICS, 1990, 69 (03) : 317 - 325
[2] OPTICAL DESIGN OF PROGRAMMABLE LOGIC-ARRAYS
MURDOCCA, MJ
HUANG, A
JAHNS, J
STREIBL, N
APPLIED OPTICS, 1988, 27 (09): : 1651 - 1660
[3] PROGRAMMABLE LOGIC-ARRAYS
PROUDFOOT, JT
ELECTRONICS AND POWER, 1980, 26 (11): : 883 - 887
[4] A DESIGN OF PROGRAMMABLE LOGIC-ARRAYS WITH UNIVERSAL TESTS
FUJIWARA, H
KINOSHITA, K
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1981, 28 (11): : 1027 - 1032
[5] A DESIGN OF PROGRAMMABLE LOGIC-ARRAYS WITH UNIVERSAL TESTS
FUJIWARA, H
KINOSHITA, K
IEEE TRANSACTIONS ON COMPUTERS, 1981, 30 (11) : 823 - 828
[6] THRESHOLD LOGIC FUNCTIONS IN PROGRAMMABLE LOGIC-ARRAYS
BENNETT, LAM
ELECTRONICS LETTERS, 1976, 12 (11) : 279 - 280
[7] OPTIMIZATION OF PROGRAMMABLE LOGIC-ARRAYS
MAK, RH
INTEGRATION-THE VLSI JOURNAL, 1984, 2 (02) : 149 - 162
[8] DESIGNING WITH PROGRAMMABLE LOGIC-ARRAYS
MAUNDY, B
MICROPROCESSORS AND MICROSYSTEMS, 1987, 11 (09) : 475 - 486
[9] DESIGN A VIRTUAL CACHE MEMORY WITH PROGRAMMABLE LOGIC-ARRAYS
FRINK, C
ELECTRONIC DESIGN, 1988, 36 (17) : 125 - &
[10] ON YIELD CONSIDERATION FOR THE DESIGN OF REDUNDANT PROGRAMMABLE LOGIC-ARRAYS
WEY, CL
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1988, 7 (04) : 528 - 535

← 1 2 3 4 5 →