DELAY OPTIMIZATION OF CARRY-SKIP ADDERS AND BLOCK CARRY-LOOKAHEAD ADDERS USING MULTIDIMENSIONAL DYNAMIC-PROGRAMMING

被引：23

作者：

CHAN, PK

SCHLAG, MDF

THOMBORSON, CD

OKLOBDZIJA, VG

机构：

[1] UNIV MINNESOTA,DEPT COMP SCI,DULUTH,MN 55812

[2] UNIV CALIF DAVIS,DEPT ELECT & COMP ENGN,DAVIS,CA 95616

来源：

IEEE TRANSACTIONS ON COMPUTERS | 1992年 / 41卷 / 08期

关键词：

BLOCK CARRY-LOOKAHEAD ADDERS; CARRY-SKIP ADDERS; CMOS; COMPUTER ARITHMETIC; DELAY OPTIMIZATION; MULTIDIMENSIONAL DYNAMIC PROGRAMMING; VLSI DESIGN;

D O I：

10.1109/12.156534

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The worst-case carry propagation delays in carry-skip adders and block carry-lookahead adders depend on how the full adders are grouped structurally together into blocks as well as the number of levels. We report on a multidimensional dynamic programming paradigm for configuring these two adders to attain minimum latency. Previous methods are applicable only to very limited delay models that do not guarantee a minimum latency configuration. Under our delay model, critical path delay is calculated not only taking into account the intrinsic gate delays, hut also the fanin and fanout contributions.

引用

页码：920 / 930

页数：11

共 22 条

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