CONSIDERATION OF FEED-THROUGH VOLTAGE IN AMORPHOUS-SI TFTS

Feed through voltage (the voltage drop that occurs when TFT changes from on-state to off-state) is an important factor in designing integrated data drive circuits and display area in TFT-LCD's. With respect to feed-through voltage, only the gate-source overlap capacitance (Cgs) has been considered in amorphous-Si (a-Si) TFT's because a-Si TFT's are of staggered structure with overlap ares. We point out that, in a-Si TFT's designed as active elements, feed-through voltage is mainly due to the carrier redistribution. The carrier redistribution model has been well known in MOS device operation. The main reason is that, since the field-effect mobility is low (W/L > 1), the leakage current must be kept low (L greater-than-or-equal-to 10 mum), and an active layer is inserted in the overlap area (unlike the case with MOS device structure), the area of active layer is large. Taking the carrier redistribution into account, the maximum voltage difference between the results obtained using the modified model and the experimental results is within 20%. By comparison, the results obtained using the previous model in TFT's are approximately three times smaller than the experimental results.