POLY I2L - HIGH-SPEED LINEAR-COMPATIBLE STRUCTURE

被引:15
作者
DAVIES, RD [1 ]
MEINDL, JD [1 ]
机构
[1] STANFORD UNIV,STANFORD ELECTR LABS,STANFORD,CA 94305
关键词
D O I
10.1109/JSSC.1977.1050916
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:367 / 375
页数:9
相关论文
共 33 条
[1]  
ALLEN RA, 1974, 1974 IEEE INT SOL ST, P16
[2]  
ANZAI A, 1976, EE412 STANF U DEP EL
[3]   MERGED-TRANSISTOR LOGIC (MTL) - LOW-COST BIPOLAR LOGIC CONCEPT [J].
BERGER, HH ;
WIEDMANN, SK .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1972, SC 7 (05) :340-&
[4]  
BLUMENFELD M, 1971, IEEE T ELECTRON DEVI, V18, P1036
[5]  
COOK R, 1975, DEC INT EL DEV M DIG
[6]   CHEMICAL VAPOR DEPOSITED POLYCRYSTALLINE SILICON. [J].
Cowher, M.E. ;
Sedgwick, T.O. .
1600, (119)
[7]  
Crippen R. E., 1976, 1976 IEEE International Solid-State Circuits Conference. (Digest of technical papers), P98
[8]  
DAVIES RD, 1977, IEEE J SOLID STATE C, V12
[9]  
den Brinker C. S., 1975, 1st European Solid State Circuits ConferenceESSCIRC (Extended abstracts only), P18
[10]  
DUNCAN DM, 1971, Patent No. 3600651