HW-SW CO-DESIGN OF MPSOC USING FGPA IP CORES

被引:0
|
作者
Nita, Iulian [1 ]
Zdru, Gabriel [1 ]
机构
[1] Univ Politehn Bucuresti, Dept Appl Elect & Informat Technol, Bucharest, Romania
来源
UNIVERSITY POLITEHNICA OF BUCHAREST SCIENTIFIC BULLETIN SERIES C-ELECTRICAL ENGINEERING AND COMPUTER SCIENCE | 2013年 / 75卷 / 01期
关键词
Multiprocessor System on Chip; FPGA; MicroBlaze; image filtering;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The new design technologies of multiprocessor systems on chip based on FPGAs and IP blocks, make possible the development of optimized devices in terms of performance, power consumption and cost. Flexibility offered by these new design tools allow design space exploration to search for the most effective implementations. Thus, in this paper, we performed a research on these technologies and we have proposed a hardware / software co-design model for developing applications on multiprocessor systems on chip based on FPGA IP cores. The experimental results were validated with an application for filtering images, implemented on a multiprocessor system using the development kit Xilinx XUP Virtex 5 and Xilinx EDK application software
引用
收藏
页码:135 / 150
页数:16
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