Additional High Input Low Output Impedance Analog Networks

被引:4
作者
Maheshwari, Sudhanshu [1 ]
Chaturvedi, Bhartendu [2 ]
机构
[1] Aligarh Muslim Univ, ZH Coll Engn & Technol, Dept Elect Engn, Aligarh 202002, Uttar Pradesh, India
[2] Jaypee Inst Informat Technol, Dept Elect & Commun Engn, Noida 201304, India
关键词
D O I
10.1155/2013/574925
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents some additional high input low output impedance analog networks realized using a recently introduced single Dual-X Current Conveyor with buffered output. The new circuits encompass several all-pass sections of first-and second-order. The voltage-mode proposals benefit from high input impedance and low output impedance. Nonideality and sensitivity analysis is also performed. The circuit performances are depicted through PSPICE simulations, which show good agreement with theory.
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页数:9
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