ALGORITHMIC FAULT TOLERANCE FOR MATRIX OPERATIONS ON TRIANGULAR ARRAYS

[1] MATRIX-INVERSION BY SYSTOLIC RANK ANNIHILATION [J]. INTERNATIONAL JOURNAL OF COMPUTER MATHEMATICS, 1987, 21 (3-4) : 319 - 357

[2] ALGORITHM-BASED FAULT TOLERANCE FOR MATRIX OPERATIONS [J]. IEEE TRANSACTIONS ON COMPUTERS, 1984, 33 (06) : 518 - 528

[3] JOU JY, 1986, P IEEE, V74, P732, DOI 10.1109/PROC.1986.13535

[4] YIELD AND PERFORMANCE ENHANCEMENT THROUGH REDUNDANCY IN VLSI AND WSI MULTIPROCESSOR SYSTEMS [J]. PROCEEDINGS OF THE IEEE, 1986, 74 (05) : 699 - 711

[5] WAFER-SCALE INTEGRATION AND 2-LEVEL PIPELINED IMPLEMENTATIONS OF SYSTOLIC ARRAYS [J]. JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING, 1984, 1 (01) : 32 - 63

[6] Leiserson C. E., 1981, THESIS CARNEGIE MELL

[7] LUK FT, P SPIE, V696

[8] MEGSON GM, 1987, THESIS LOUGHBOROUGH

[9] MEGSON GM, 1988, INT J COMPUT MATH

[10] SAMI M, 1986, P IEEE, V74, P712, DOI 10.1109/PROC.1986.13533

[1] MATRIX-INVERSION BY SYSTOLIC RANK ANNIHILATION [J]. INTERNATIONAL JOURNAL OF COMPUTER MATHEMATICS, 1987, 21 (3-4) : 319 - 357

[2] ALGORITHM-BASED FAULT TOLERANCE FOR MATRIX OPERATIONS [J]. IEEE TRANSACTIONS ON COMPUTERS, 1984, 33 (06) : 518 - 528

[3] JOU JY, 1986, P IEEE, V74, P732, DOI 10.1109/PROC.1986.13535

[4] YIELD AND PERFORMANCE ENHANCEMENT THROUGH REDUNDANCY IN VLSI AND WSI MULTIPROCESSOR SYSTEMS [J]. PROCEEDINGS OF THE IEEE, 1986, 74 (05) : 699 - 711

[5] WAFER-SCALE INTEGRATION AND 2-LEVEL PIPELINED IMPLEMENTATIONS OF SYSTOLIC ARRAYS [J]. JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING, 1984, 1 (01) : 32 - 63

[6] Leiserson C. E., 1981, THESIS CARNEGIE MELL

[7] LUK FT, P SPIE, V696

[8] MEGSON GM, 1987, THESIS LOUGHBOROUGH

[9] MEGSON GM, 1988, INT J COMPUT MATH

[10] SAMI M, 1986, P IEEE, V74, P712, DOI 10.1109/PROC.1986.13533