Performance Improvement of Montgomery Multiplier Architecture Using Pre-Computation and Unfolding Technique

被引:0
|
作者
Gajbhiye, Prafulani [1 ]
Joshi, Pankaj [1 ]
机构
[1] Ramdeobaba Coll Engn & Management, Dept Elect Engn, Nagpur, Maharashtra, India
来源
HELIX | 2018年 / 8卷 / 06期
关键词
Montgomery Multiplication; Delay Optimization; Pre-Computation; Unfolded Technique;
D O I
10.29042/2018-4433-4440
中图分类号
Q81 [生物工程学(生物技术)]; Q93 [微生物学];
学科分类号
071005 ; 0836 ; 090102 ; 100705 ;
摘要
The Modern era of information and communication technology demands security. It is a prime important parameter along with other features. Data encryption and decryption algorithms such as RSA and ECC are popularly used to get the desired level of security. Modular multiplication is the integral part of these algorithms. Montgomery Multiplication is most efficient algorithm for modular multiplication. The modulo multiplication is a slow process for large bit size computations for key size more than 512. The critical path delay in architecture affects the iteration delay and overall computation time of encryption and decryption. The slow ripples of the carries in the Montgomery multiplication are often replaced by the carry save architectures of additions. The paper optimizes this traditional approach using a novel combination of an unfolding algorithm and a pre-computation technique. A new architectureMM4_2 multiplier, which holds input and output in carry save format and consuming the smallest critical path, is also modified using unfolding approach. The novel approach improves the overall computation time by 37.89% and 34.68% for ASIC and FPGA implementations as compared to traditional carry save approach. Further, unfolding of MM42_Multiplier in resent architecture gives improvement of 10.98 % in ASIC and 31.24% in FPGA as compare to original MM42 multiplier architecture.
引用
收藏
页码:4433 / 4440
页数:8
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