2-PATH STRUCTURE FOR HIGH-PERFORMANCE SIGMA-DELTA MODULATORS

被引：2
|
作者：
SAMORI, C [1 ]
BASCHIROTTO, A [1 ]
LIBERALI, V [1 ]
机构：
[1] UNIV PAVIA,DIPARTIMENTO ELETTRON,PAVIA,ITALY
来源：
ELECTRONICS LETTERS | 1995年 / 31卷 / 19期
关键词：
SIGMA-DELTA MODULATION;
D O I：
10.1049/el:19951155
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A new parallel time-interleaved architecture for a two-path second-order switched-capacitor (SC) sigma-delta modulator is presented. This structure allows doubling of the oversampling sampling ratio (OSR) and, in addition, leaves an idle clock phase available for compensation of nonidealities. Simulations show that the presented architecture has a low sensitivity to path mismatch.
引用
收藏
页码：1624 / 1625
页数：2
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