FAULT PREDICTION FOR ANALOG CIRCUITS

被引：7

作者：

JIANG, BL ^{[1
]}

WEY, CL ^{[1
]}

FAN, LJ ^{[1
]}

机构：

[1] XIAN JIAOTONG UNIV,DEPT ELECT ENGN,XIAN,PEOPLES R CHINA

来源：

CIRCUITS SYSTEMS AND SIGNAL PROCESSING | 1988年 / 7卷 / 01期

关键词：

D O I：

10.1007/BF01600009

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

ELECTRIC NETWORKS

引用

页码：95 / 109

页数：15

共 16 条

[1]

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[2]

Bandler J. W., 1982, 1982 International Symposium on Circuits and Systems, P1140

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BANDLER, JW ;

SALAMA, AE .

PROCEEDINGS OF THE IEEE, 1985, 73 (08) :1279-1325

[4] MULTIPLE-FAULT LOCATION OF ANALOG CIRCUITS [J].

BIERNACKI, RM ;

BANDLER, JW .

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1981, 28 (05) :361-367

[5]

BIERNACKI RM, 1980, 1980 P IEEE INT S CI, P1078

[6] NODE-FAULT DIAGNOSIS AND A DESIGN OF TESTABILITY [J].

HUANG, ZF ;

LIN, CS ;

LIU, RW .

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1983, 30 (05) :257-265

[7]

Jiang B. L., 1986, 1986 IEEE International Symposium on Circuits and Systems (Cat. No.86CH2255-8), P1261

[8]

JIANG BL, THESIS MICHIGAN STAT

[9]

LIBERTY SR, 1977, RATIONAL FAULT ANAL, P135

[10] APPROACH TO BUILT-IN TESTING [J].

SAEKS, R .

IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS, 1978, 14 (05) :813-818

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