SIMULATED ANNEALING ALGORITHMS - AN OVERVIEW

被引：443

作者：

RUTENBAR, RA ^{[1
]}

机构：

[1] CARNEGIE MELLON UNIV, COMP SCI, PITTSBURGH, PA 15213 USA

来源：

IEEE CIRCUITS & DEVICES | 1989年 / 5卷 / 01期

关键词：

D O I：

10.1109/101.17235

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：19 / 26

页数：8

共 8 条

[1]

JAYARAMAN R, 1987, NOV P INT C COMP AID, P346

[2]

JEPSEN DW, 1984, NOV P IEEE INT C COM, P495

[3] OPTIMIZATION BY SIMULATED ANNEALING [J].

KIRKPATRICK, S ;

GELATT, CD ;

VECCHI, MP .

SCIENCE, 1983, 220 (4598) :671-680

[4]

Reingold E. M., 1977, COMBINATORIAL ALGORI

[5]

Sangiovanni-Vincentelli A., 1987, Design Systems for VLSI Circuits. Logic Synthesis and Silicon Compilation. Proceedings of the NATO Advanced Study Institute, P113

[6] THE TIMBERWOLF PLACEMENT AND ROUTING PACKAGE [J].

SECHEN, C ;

SANGIOVANNIVINCENTELLI, A .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1985, 20 (02) :510-522

[7]

van Laarhoven P.J.M., 1987, SIMULATED ANNEALING, P7

[8]

Wong D. F., 1986, 23rd ACM/IEEE Design Automation Conference. Proceedings 1986 (Cat. No.86CH2288-9), P101, DOI 10.1145/318013.318030

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