Hardware Implementation of the Multirate Decimation Filter for Noise Thermometer based on FPGA

This paper introduces an efficient Field Programmable Gate Array (FPGA) realization of a multirate decimation filter with narrow pass-band and narrow transition band for Noise thermometer application. The filter is composed of three stages; the first stage is a Cascaded Integrator Comb (CIC) decimation filter, the second stage is a two-coefficient half-band (HB) filter and the last stage is a sharper transition half-band filter. The frequency responses and implementation area of the proposed filter stages are compared. Using CIC-HB technique saves 18% of the design area, compared to the six stages half band filters.