DYNAMIC MALFUNCTION LIMITS IN HIGH-SPEED TTL AND ECL INTEGRATED DIGITAL GATES

被引：0

作者：

ABDELLAT.M ^{[1
]}

STRUTT, MJO ^{[1
]}

机构：

[1] SWISS FED INST TECHNOL,DEPT ADV ELECT ENGN,ZURICH,SWITZERLAND

来源：

MICROELECTRONICS AND RELIABILITY | 1973年 / 12卷 / 01期

关键词：

D O I：

10.1016/0026-2714(73)90718-X

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：57 / 60

页数：4

共 6 条

[1] ABDELLATIF M, 1971, AEU-ARCH ELEKTRON UB, V25, P267
[2] IMPAIRMENT OF NOISE IMMUNITY OF DIGITAL MONOLITHIC INTEGRATED CIRCUITS CAUSED BY SUPPLY-LINE AND EARTH-LINE CURRENT SPIKES IN CONJUNCTION WITH COAXIAL-CABLE CONNECTIONS
ABDELLATIF, M
STRUTT, MJO
[J]. ELECTRONICS LETTERS, 1970, 6 (20) : 643 - +
[3] ABDELLATIF M, 1969, ARCH ELEKTR UBERTRAG, V23, P577
[4] ABDELLATIF M, 1968, ELECTRON LETT, V4, P496, DOI 10.1049/el:19680387
[5] JARVIS DB, 1963, IEEE T ELECTRON COMP, VEC12, P476
[6] YAO FC, 1965, IEEE T ELECTRON COMP, VEC14, P875