Adaptive Thermal Monitoring of Deep-Submicron CMOS VLSI Circuits

被引：0

作者：

Zjajo, Amir ^{[1
]}

van der Meijs, Nick ^{[1
]}

van Leuken, Rene ^{[1
]}

机构：

[1] Delft Univ Technol, Circuits & Syst Grp, Mekelweg 4, NL-2628 CD Delft, Netherlands

来源：

JOURNAL OF LOW POWER ELECTRONICS | 2013年 / 9卷 / 04期

关键词：

Integrated Circuits; Temperature Sensors; Simulation; Thermal Analysis; Thermal Management;

D O I：

10.1166/jolpe.2013.1279

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In integrated circuits accurate runtime sensing of on-chip temperature is required to establish efficient dynamic thermal management techniques. In this paper, we propose novel sensor allocation and placement algorithm and thermal sensing technique for indirect temperature estimation at arbitrary locations. As the experimental results indicate, the runtime thermal estimation method reduces temperature estimation errors by an order of magnitude.

引用

页码：403 / 413

页数：11

共 50 条

[1] Leakage current in deep-submicron CMOS circuits
Roy, K
Mukhopadhyay, S
Mahmoodi-Meimand, H
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2002, 11 (06) : 575 - 600
[2] Challenges to accuracy for the design of deep-submicron RF-CMOS circuits
Yoshitomi, Sadayuki
PROCEEDINGS OF THE ASP-DAC 2007, 2007, : 438 - 441
[3] Leakage control for deep-submicron circuits
Roy, K
Mahmoodi-Meimand, H
Mukhopadhyay, S
VLSI CIRCUITS AND SYSTEMS, 2003, 5117 : 135 - 146
[4] Low power domino logic circuits in deep-submicron technology using CMOS
Garg, Sandeep
Gupta, Tarun Kumar
ENGINEERING SCIENCE AND TECHNOLOGY-AN INTERNATIONAL JOURNAL-JESTECH, 2018, 21 (04): : 625 - 638
[5] Fault clustering in deep-submicron CMOS processes
Schat, Jan
2008 DESIGN, AUTOMATION AND TEST IN EUROPE, VOLS 1-3, 2008, : 1360 - 1363
[6] Gate engineering for deep-submicron CMOS transistors
Yu, B
Ju, DH
Lee, WC
Kepler, N
King, TJ
Hu, CM
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1998, 45 (06) : 1253 - 1262
[7] RF integration into CMOS and deep-submicron challenges
Svensson, C
Soumyanath, K
Kaiser, B
Vasudev, PK
Carley, LR
Kalter, H
Ackland, B
IEEE DESIGN & TEST OF COMPUTERS, 1999, 16 (03): : 112 - 116
[8] Identifying defects in deep-submicron CMOS ICs
Soden, JM
Hawkins, CF
Miller, AC
IEEE SPECTRUM, 1996, 33 (09) : 66 - 71
[9] Fault tuples in diagnosis of deep-submicron circuits
Blanton, RD
Chen, JT
Desineni, R
Dwarakanath, KN
Maly, W
Vogels, TJ
INTERNATIONAL TEST CONFERENCE 2002, PROCEEDINGS, 2002, : 233 - 241
[10] Novel simulation of deep-submicron MOSFET circuits
Bruma, S
Otten, RHJM
INTERNATIONAL CONFERENCE ON COMPUTER DESIGN - VLSI IN COMPUTERS AND PROCESSORS, PROCEEDINGS, 1997, : 62 - 67

← 1 2 3 4 5 →