SYSTOLIC ARRAYS FOR IMPLEMENTATION OF FINITE MEMORY FILTERS

被引：0

作者：

SREERAM, V ^{[1
]}

ELGUIBALY, F ^{[1
]}

AGATHOKLIS, P ^{[1
]}

机构：

[1] UNIV VICTORIA,DEPT ELECT & COMP ENGN,VICTORIA V8W 3P6,BC,CANADA

来源：

INTERNATIONAL JOURNAL OF ELECTRONICS | 1992年 / 72卷 / 01期

关键词：

Electric Filters;

D O I：

10.1080/00207219208925552

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Hardware implementations of 1-D finite memory filters are presented. Two types of realizations of finite memory filters are considered: non-recursive and recursive. The hardware implementation of these filters is based on systolic array architecture. Linear arrays are proposed for the implementation of both non-recursive and recursive filters. Further, two different schemes are proposed for the recursive filter. All these implementations are discussed using performance measures such as latency, delay, duration and input/output data rate.

引用

页码：37 / 44

页数：8