A STUDY OF THE RESETABILITY OF SYNCHRONOUS SEQUENTIAL-CIRCUITS

被引：0
|
作者：
LIOY, A [1 ]
PONCINO, M [1 ]
机构：
[1] POLITECN TORINO, DIPARTIMENTO AUTOMAT & INFORMAT, I-10129 TURIN, ITALY
来源：
MICROPROCESSING AND MICROPROGRAMMING | 1993年 / 38卷 / 1-5期
关键词：
D O I：
10.1016/0165-6074(93)90173-I
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
The resetability of synchronous sequential circuits is investigated through an improved three-value simulation-based algorithm and a parallel synchronizing-tree method. It is shown that many standard benchmarks can be reset using one of these two methodologies, including some circuits which cannot be analyzed by current BDD-based symbolic algorithms.
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页码：395 / 402
页数：8
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