DESIGN AND ANALYSIS OF DELAY-INSENSITIVE MODULO-N COUNTERS

被引：2

作者：

EBERGEN, JC

PEETERS, AMG

机构：

[1] UNIV WATERLOO,DEPT COMP SCI,WATERLOO N2L 3G1,ONTARIO,CANADA

[2] EINDHOVEN UNIV TECHNOL,DEPT MATH & COMP SCI,5600 MB EINDHOVEN,NETHERLANDS

来源：

FORMAL METHODS IN SYSTEM DESIGN | 1993年 / 3卷 / 03期

关键词：

CIRCUIT DESIGN; MODULO-N COUNTERS; CIRCUIT ANALYSIS; ASYNCHRONOUS CIRCUITS;

D O I：

10.1007/BF01384074

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

Various delay-insensitive circuits for modulo-N counters are formally derived and analyzed. Modulo-N counter's are used in many circuit designs and have a simple specification, but allow for a surprising variety of decompositions into networks of basic components. We present three decompositions in detail. Along the way we ''plain our correctness criteria and show how to analyze the area complexity and response time of each decomposition. Our final decomposition for the modulo-N counter has optimal area complexity of THETA(logN) and optimal response time of THETA(1).

引用

页码：211 / 232

页数：22

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