Low power, high speed Schmitt trigger using SVL technique in nanoscale CMOS technology

被引:2
作者
Saxena, Anshul [1 ]
Shrivastava, Akansha [1 ]
Akashe, Shyam [2 ]
机构
[1] Pt Devprabhakar Shastri Coll Technol, Elect & Commun Engn Dept, Chhatarpur 471001, MP, India
[2] Inst Technol & Management Univ, Dept Elect & Instrumentat, Gwalior 474001, MP, India
关键词
cadence virtuoso; Schmitt trigger; SVL technique; static & dynamic power; hysteresis width; propagation delay; voltage gain; efficiency; leakage power; transconductance; frequency jitter & period jitter;
D O I
10.1504/IJSISE.2016.075002
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Schmitt trigger device is mostly used in analogue and digital circuit as a wave-shaping device to resolve the noise problem, widely used to drive the load with fast switching low-power loss and low-power supply. Conventional Schmitt trigger provides more leakage power, so 4T Schmitt trigger overcomes this problem by using the Self-Controllable Voltage Level (SVL) techniques. The main purpose of this paper is to present the performance factor of Schmitt trigger by applying U-SVL and L-SVL and both technique. The simulation results perform in cadence tool and reported that static power (3.98 fW), dynamic power (38.04 pW), propagation delay (6.13 psec), hysteresis width (0.877 V), voltage gain (30.03 dB), periodic jitter (80 ns), frequency jitter (24.26 kHz), efficiency (63.06%), spectral power (5.388 aW), transconductance (7.17 x 10(-14) S) and the total leakage power of individual transistors (1.17 pW) improve using both U-SVL and L-SVL techniques simultaneously with nanoscale measurement with supply voltage V-dd = 0.7 V.
引用
收藏
页码:85 / 94
页数:10
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