REALIGNMENT OF AS DOPED SILICON FILMS DEPOSITED ON (100) SILICON SUBSTRATES

被引:7
作者
BENYAICH, F
PRIOLO, F
RIMINI, E
SPINELLA, C
BAROETTO, F
CANNAVO, S
WARD, P
机构
[1] Dipartimento di Fisica, Catania Univ.
关键词
D O I
10.1088/0268-1242/6/9/003
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The epitaxial realignment induced by high temperature rapid thermal annealing of ion implanted polycrystalline and amorphous layers deposited on to <100> oriented Si substrates has been studied. The As doses ranged form 2 x 10(15) to 2 x 10(16) cm-2 and the annealing temperature from 1000 to 1150-degrees-C for annealing times ranging from 5 to 100 s. The characterization of the processed layers has been performed by means of Rutherford backscattering and channelling spectroscopy, sheet resistance measurements and transmission electron microscopy. This study shows that in the temperature and time ranges used here, an As concentration larger than 1 x 10(20) cm-3 is necessary to induce the epitaxial realignment of the polycrystalline layer. However, for the amorphous layers a higher As concentration is needed. The difference is related to the way in which the As atoms redistribute in the two layers. It is found that the heavily doped amorphous layers can be realigned with limited As redistribution, thus giving them the potential of being used in the microelectronics technology for the formation of shallow junctions.
引用
收藏
页码:850 / 856
页数:7
相关论文
共 18 条
[1]  
Kim DM, Qian F, Bickford CU, Yu S, Mater. Res. Soc. Symp. Proc., 106, (1988)
[2]  
Crabbe EF, Hoyt JL, Pease RFW, Gibbons JF, Mater. Res. Soc. Symp. Proc., 106, (1988)
[3]  
Bravman JC, Patton GL, Plummer JD, J. Appl. Phys., 57, 8, (1985)
[4]  
Patton GL, Bravman JC, Plummer JD, Physics, technology, and modeling of polysilicon emitter contacts for VLSI bipolar transistors, IEEE Transactions on Electron Devices, 33, 11, (1986)
[5]  
Sagara K, Nakamura T, Tamaki Y, Shiba T, The effect of thin interfacial oxides on the electrical characteristics of silicon bipolar devices, IEEE Transactions on Electron Devices, 34, 11, (1987)
[6]  
Chor EF, Ashburn P, Brunshweiler A, IEEE Trans. Electron. Devices Lett., 6, 10, (1985)
[7]  
Delfinot M, Groot JG, Ritz KN, Maillot P, Polycrystalline Silicon Emitter Contacts Formed by Rapid Thermal Annealing, Journal of The Electrochemical Society, 136, 1, (1989)
[8]  
Wolstenholm GR, Jorgensen N, Ashburn P, Booker GR, An investigation of the thermal stability of the interfacial oxide in polycrystalline silicon emitter bipolar transistors by comparing device results with high-resolution electron microscopy observations, Journal of Applied Physics, 61, 1, (1987)
[9]  
Ogawa S, Okuda S, Zouzaki T, Yoshida T, Yioshioka Y, Mater. Res. Soc. Symp. Proc., 106, (1988)
[10]  
Hoyt JL, Grabbe EF, Gibbons JF, Pease RF, Appl. Phys. Lett., 50, 12, (1987)