RNS-BASED ENHANCEMENTS FOR DIRECT DIGITAL FREQUENCY-SYNTHESIS

被引:18
作者
CHREN, WA
机构
[1] School of Electrical Engineering, Grand Valley State University, Grand Rapids
来源
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING | 1995年 / 42卷 / 08期
关键词
D O I
10.1109/82.404073
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Two synthesizer designs are presented which exemplify the advantages of the use of the Residue Number System in Direct Digital Frequency Synthesis. The Frequency Agile Direct Synthesizer (FADS) exhibits a frequency switching latency which is reduced by more than a third below that of traditional, binary number system-based designs. The Reduced Area Direct Synthesizer (RADS) has a chip area which is reduced by more than 40% below that of the traditional designs. The area reduction is due to the decomposition of the sine ROM into several small look-up tables accessed in parallel. The latency reduction is due to the shortening of the carry paths in the Phase Accumulator.
引用
收藏
页码:516 / 524
页数:9
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