RISC SYSTEM/6000 PROCESSOR ARCHITECTURE

被引:6
作者
GROVES, RD [1 ]
OEHLER, R [1 ]
机构
[1] IBM CORP,THOMAS J WATSON RES CTR,YORKTOWN HTS,NY 10598
关键词
microprocessors; RISC; superscalar architectures;
D O I
10.1016/0141-9331(90)90108-8
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The 801 minicomputer1 project at IBM Research in Yorktown Heights, NY, USA, in 1975 pioneered many of architectural concepts used in RISC including IBM's RT System. The paper describes a second-generation RISC architecture, the POWER architecture, which is based on subsequent research by the original 801 team and is used in the recently announced RISC System/6000. The architecture was designed to support superscalar implementations which can execute multiple instructions every cycle. It provides compound-function instructions which allow application path lengths to be less than would be required on many complex instruction set computers. The architecture also exploits advances in optimizing compiler and operating system technology. An extension to the original 801 virtual memory architecture for hardware support of database storage is also described. © 1990.
引用
收藏
页码:357 / 366
页数:10
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