AN ANALYTICAL A-SI-H TFT DC CAPACITANCE MODEL USING AN EFFECTIVE TEMPERATURE APPROACH FOR DERIVING A SWITCHING TIME MODEL FOR AN INVERTER CIRCUIT CONSIDERING DEEP AND TAIL STATES

This paper presents an analytical a-Si:H DC/capacitance model using an effective temperature approach for deriving a switching time model for an inverter circuit considering deep and tail states. Using an effective temperature approach, the localized deep and tail states have been considered in the DC/capacitance model and the switching time model. As verified by the published data, the analytical DC/capacitance model provides an accurate prediction. Based on the analytical model, the threshold voltage of an a-Si:H TFT is proportional to the deep state density and the switching time of the TFT inverter is dependent on the tail state density.