GATE ARRAY IMPLEMENTATION OF A MULTICHANNEL ACCUMULATOR USING A SERIAL DATAPATH

被引:0
作者
HARROLD, SJ
机构
[1] Department of Electrical Engineering and Electronics, University of Manchester Institute of Science and Technology, Manchester, M60 1QD
关键词
gate arrays; microsystems; semicustom design;
D O I
10.1016/0141-9331(90)90079-B
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Experiences gained in the design of a multichannel accumulator instrument are described. In particular, the problem of reduced cell availability when implementing wide datapaths on gate arrays is highlighted. A solution to this problem in the form of a serial datapath is proposed, and the relative advantages and disadvantages are discussed. Use of a serial architecture in this project allowed the multichannel accumulator logic to be implemented on a much smaller (and cheaper) gate array than would have been required by a parallel architecture version. © 1990.
引用
收藏
页码:205 / 209
页数:5
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