DESIGN OF RESISTANCE-CAPACITANCE NULL NETWORKS

被引:5
作者
RAMACHANDRAN, V
机构
来源
PROCEEDINGS OF THE INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS | 1967年 / 55卷 / 08期
关键词
D O I
10.1109/PROC.1967.5874
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
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页码:1507 / +
页数:1
相关论文
共 3 条
[1]   DESIGN OF PARALLEL-T RESISTANCE CAPACITANCE NETWORKS [J].
ISHIKAWA, H .
IEEE TRANSACTIONS ON CIRCUIT THEORY, 1966, CT13 (02) :214-&
[2]   A NOTE ON DESIGN OF RC NOTCH NETWORKS WITH MAXIMUM GAIN [J].
MITRA, SK .
PROCEEDINGS OF THE INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS, 1966, 54 (10) :1487-&
[3]  
PRABHAVATHI G, TO BE PUBLISHED