8X8 BIT PIPELINED DADDA MULTIPLIER IN CMOS

被引：9

作者：

CRAWLEY, DG

AMARATUNGA, GAJ

机构：

来源：

IEE PROCEEDINGS-G CIRCUITS DEVICES AND SYSTEMS | 1988年 / 135卷 / 06期

关键词：

D O I：

10.1049/ip-g-1.1988.0033

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：231 / 240

页数：10

共 20 条

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[3] PIPELINED CARRY LOOK-AHEAD ADDER [J].

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[4]

Dadda L., 1965, ALTA FREQ, V34, P349

[5]

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[6] A 70-MHZ 8-BIT X 8-BIT PARALLEL PIPELINED MULTIPLIER IN 2.5-MU-M CMOS [J].

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CASH, GL .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1986, 21 (04) :505-513

[7] A 16-BIT X 16-BIT PIPELINED MULTIPLIER MACROCELL [J].

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LEWIS, ET .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1985, 20 (02) :542-547

[8]

Hiltebeitel J. S., 1984, IBM Technical Disclosure Bulletin, V27

[9]

HWANG K, 1979, COMPUTER ARITHMETIC

[10]

JUMP JR, 1978, IEEE T COMPUT, V27, P855, DOI 10.1109/TC.1978.1675205

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