SWITCHED-CURRENT CMOS TERNARY LOGIC-CIRCUITS

被引：0
作者：
SHOUSHA, AHM
机构：
[1] Electrical Engineering Department, U.A.E. University, Al-Ain
来源：
INTERNATIONAL JOURNAL OF ELECTRONICS | 1995年 / 79卷 / 05期
关键词：
D O I：
10.1080/00207219508926298
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A new switched-current CMOS ternary logic family is presented. Circuit descriptions of the basic gates (inverters, NAND, and NOR) are presented and their performance characteristics are evaluated using SPICE simulations. The results obtained indicate that the proposed circuits have good noise margins of about 15% of the power supply voltage, and that the propagation delay is less than 1 ns in most cases. Scaled gates, using the constant field scaling law, are found to operate efficiently at reduced power supply voltages, down to 1.0 V. A design procedure to implement any ternary logic function using the proposed gates as basic building blocks is also given.
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页码：617 / 625
页数：9
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