DESIGN AND SCALING OF A SONOS MULTIDIELECTRIC DEVICE FOR NONVOLATILE MEMORY APPLICATIONS

被引：47

作者：

FRENCH, ML ^{[1
]}

CHEN, CY ^{[1
]}

SATHIANATHAN, H ^{[1
]}

WHITE, MH ^{[1
]}

机构：

[1] LEHIGH UNIV,DEPT ELECT ENGN & COMP SCI,SHERMAN FAIRCHILD LAB,BETHLEHEM,PA 18015

来源：

IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY PART A | 1994年 / 17卷 / 03期

基金：

美国国家科学基金会;

关键词：

D O I：

10.1109/95.311748

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

The evolution of high-density EEPROM's continually imposes a demand on reducing power consumption while improving data retention and endurance. To meet these demands, we propose a scalable multidielectric nonvolatile memory technology where the data storage is in the form of charge trapping within the oxide-nitride-oxide (ONO) gate dielectric. This technology, called SONOS (polysilicon-blocking oxide-silicon nitride-tunnel oxide-silicon), has demonstrated remarkable scalability in programming voltage. To determine our scaling guidelines, we have developed an analytical model for the transient characteristics that examines the influence of the dielectric composition and programming voltage on programming speed. These guidelines have resulted in a scaled SONOS nonvolatile memory device that has demonstrated 8-9 V programmability with an extension towards 5 V and can be used as an ideal candidate for semiconductor disk, NVRAM, and neural network applications.

引用

页码：390 / 397

页数：8

共 24 条

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