DIELECTRIC ISOLATION TECHNIQUES FOR INTEGRATED-CIRCUITS

被引：5
作者：
BOSNELL, JR [1 ]
机构：
[1] ROY RADAR ESTAB, MALVERN, WORCESTERSHIRE, ENGLAND
来源：
MICROELECTRONICS RELIABILITY | 1976年 / 15卷 / 02期
关键词：
D O I：
10.1016/0026-2714(76)90372-3
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
收藏
页码：113 / 122
页数：10
相关论文
共 58 条
[1]  
ALLISON DF, 1969, ELECTRONICS, P112
[2]   SILICON-ON-SAPPHIRE COMPLEMENTARY MOS MEMORY CELLS [J].
ALLISON, JF ;
HEIMAN, FP ;
BURNS, JR .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1967, SC 2 (04) :208-&
[3]  
BAKER WD, 1973, ELECTRONICS 0329, P65
[4]   APPLICATION OF SILICON CRYSTAL ORIENTATION AND ANISOTROPIC EFFECTS TO CONTROL OF CHARGE SPREADING IN DEVICES [J].
BEAN, KE ;
LAWSON, JR .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1974, SC 9 (03) :111-117
[5]  
BEAN KE, 1973, SEMICONDUCTOR SILICO, P880
[6]  
BEYEN WJ, 1973, SEMICONDUCTOR SILICO, P1
[7]  
Bosnell J. R., 1971, Microelectronics, V3, P33
[8]  
BOSNELL JR, 1974, 4TH EUR SOL STAT DEV
[9]  
Brack K., 1973, Crystal Lattice Defects, V4, P109
[10]  
BRACK K, 1972, Patent No. 1274726
123456