DEFECT SIZE VARIATIONS AND THEIR EFFECT ON THE CRITICAL AREA OF VLSI DEVICES

被引：39

作者：

FERRISPRABHU, AV

机构：

[1] IBM, Essex Junction, VT, USA, IBM, Essex Junction, VT, USA

来源：

关键词：

D O I：

10.1109/JSSC.1985.1052404

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

INTEGRATED CIRCUITS, VLSI

引用

页码：878 / 880

页数：3

共 5 条

[1] MODELING THE CRITICAL AREA IN YIELD FORECASTS [J].

FERRISPRABHU, AV .

[2]

FERRISPRABHU AV, 1982, IBM TR1990200 TECH R

[3]

FERRISPRABHU AV, 1981, IBM TR1990199 TECH R

STAPPER, CH .

[5] MODELING OF INTEGRATED-CIRCUIT DEFECT SENSITIVITIES [J].

STAPPER, CH .