Step-recessed gate GaAs MESFETs have been successfully developed using an n(-)/n epi-layer structure. The n(-) layer under the gate metal with optimized thickness effectively increases the maximum drain current without decrease in the gate to drain breakdown voltage. The fabricated FET (Field Effect Transistor) with a 12.8 mm gate width, evaluated at a 5.8 V drain bias, demonstrated high-power added efficiency at 900 MHz. Efficiencies of 62% (P-out = 35.5 dBm) and 70% (P-out = 31.5 dBm) were achieved. The new power GaAs FET is expected to be used in applications in handheld phones.