A BILATERAL LOGIC CIRCUIT UTILIZING TRANSMISSION TIME DELAY OF SIGNALS

被引：0
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作者：
YAJIMA, S
IBARAKI, T
KUBOTA, K
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ELECTRONICS & COMMUNICATIONS IN JAPAN | 1966年 / 49卷 / 12期
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TM [电工技术]; TN [电子技术、通信技术];
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0808 ; 0809 ;
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页码：102 / &
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