HIGH-PERFORMANCE TRANSISTORS WITH ARSENIC-IMPLANTED POLYSIL EMITTERS

被引：106

作者：

GRAUL, J ^{[1
]}

GLASL, A ^{[1
]}

MURRMANN, H ^{[1
]}

机构：

[1] SIEMENS AG,WERK HALBLEITER,MUNICH,FED REP GER

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1976年 / 11卷 / 04期

关键词：

D O I：

10.1109/JSSC.1976.1050764

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：491 / 495

页数：5

共 15 条

[1] INVESTIGATION OF CURRENT-GAIN TEMPERATURE DEPENDENCE IN SILICON TRANSISTORS [J].

BUHANAN, D .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1969, ED16 (01) :117-+

[2]

Burker U., 1975, Siemens Forschungs- und Entwicklungsberichte, V4, P238

[3] OPTIMUM LOW-LEVEL INJECTION EFFICIENCY OF SILICON TRANSISTORS WITH SHALLOW ARSENIC EMITTERS [J].

FAIR, RB .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1973, ED20 (07) :642-647

[4] BIPOLAR HIGH-SPEED LOW-POWER GATES WITH DOUBLE IMPLANTED TRANSISTORS [J].

GRAUL, J ;

KAISER, H ;

WILHELM, WJ ;

RYSSEL, H .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1975, 10 (04) :201-204

[5]

GUMMEL HK, 1961, P IRE, V49, P834

[6] EFFECT OF EMITTER DOPING ON DEVICE CHARACTERISTICS [J].

KANNAM, PJ .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1973, ED20 (10) :845-851

[7] TEMPERATURE DEPENDENCE OF IDEAL GAIN IN DOUBLE DIFFUSED SILICON TRANSISTORS [J].

KAUFFMAN, WL ;

BERGH, AA .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1968, ED15 (10) :732-+

[8] CALCULATION OF EMITTER EFFICIENCY OF BIPOLAR TRANSISTORS [J].

MERTENS, RP ;

DEMAN, HJ ;

VANOVERS.RJ .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1973, ED20 (09) :772-778

[9]

MURRMANN H, 1974, 6TH INT C MICR MUNCH

[10] FULLY ION-IMPLANTED BIPOLAR-TRANSISTORS [J].

PAYNE, RS ;

SCAVUZZO, RJ ;

OLSON, KH ;

NACCI, JM ;

MOLINE, RA .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1974, ED21 (04) :273-278

← 1 2 →