共 50 条
- [42] Arithmetic pattern generators for built-in self-test INTERNATIONAL CONFERENCE ON COMPUTER DESIGN - VLSI IN COMPUTERS AND PROCESSORS, PROCEEDINGS, 1996, : 131 - 134
- [43] A programmable built-in self-test for embedded DRAMs 2005 IEEE INTERNATIONAL WORKSHOP ON MEMORY TECHNOLOGY, DESIGN, AND TESTING - PROCEEDINGS, 2005, : 58 - 63
- [44] Effective built-in self-test for booth multipliers IEEE DESIGN & TEST OF COMPUTERS, 1998, 15 (03): : 105 - 111
- [45] Parametric Built-In Self-Test of VLSI systems DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION 1999, PROCEEDINGS, 1999, : 376 - 380
- [46] Application of cellular automata in built-in self-test PROCEEDINGS OF THE FIRST INTERNATIONAL SYMPOSIUM ON TEST AUTOMATION & INSTRUMENTATION, VOLS 1 - 3, 2006, : 1367 - 1370
- [47] Modified Geffe test pattern generator for built-in self-test 2007 IEEE PACIFIC RIM CONFERENCE ON COMMUNICATIONS, COMPUTERS AND SIGNAL PROCESSING, VOLS 1 AND 2, 2007, : 206 - 209
- [48] Analysis of Test Sequence Generators for Built-In Self-Test Implementation ICACCS 2015 PROCEEDINGS OF THE 2ND INTERNATIONAL CONFERENCE ON ADVANCED COMPUTING & COMMUNICATION SYSTEMS, 2015,
- [50] Designing built-in self-test circuits for embedded memories test PROCEEDINGS OF THE SECOND IEEE ASIA PACIFIC CONFERENCE ON ASICS, 2000, : 315 - 318