CALCULATION OF THE DISCRETE HARTLEY TRANSFORM VIA THE FERMAT NUMBER TRANSFORM USING A VLSI CHIP

被引：13

作者：

BOUSSAKTA, S

HOLT, AGJ

机构：

来源：

IEE PROCEEDINGS-G CIRCUITS DEVICES AND SYSTEMS | 1988年 / 135卷 / 03期

关键词：

D O I：

10.1049/ip-g-1.1988.0014

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：101 / 103

页数：3

共 10 条

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[2] DISCRETE HARTLEY TRANSFORM [J].

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[3] THE FAST HARTLEY TRANSFORM [J].

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[4]

HARTLEY RVL, 1942, P IRE, V30, P144

[5] TWO-DIMENSIONAL DISCRETE FOURIER-TRANSFORM WITH SMALL MULTIPLICATIVE COMPLEXITY USING NUMBER THEORETIC TRANSFORMS [J].

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SALEH, RA .

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[6]

Kolba D.P., 1977, IEEE T ASSP, V25

[7] DISCRETE FOURIER TRANSFORMS WHEN NUMBER OF DATA SAMPLES IS PRIME [J].

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[8]

SIU WC, 1983, IEE PROC-G, V130, P201, DOI 10.1049/ip-g-1.1983.0036

[9] ON COMPUTING THE DISCRETE HARTLEY TRANSFORM [J].

SORENSEN, HV ;

JONES, DL ;

BURRUS, CS ;

HEIDEMAN, MT .

IEEE TRANSACTIONS ON ACOUSTICS SPEECH AND SIGNAL PROCESSING, 1985, 33 (05) :1231-1238

[10] CASCADABLE NMOS VLSI CIRCUIT FOR IMPLEMENTING A FAST CONVOLVER USING THE FERMAT NUMBER TRANSFORM [J].

TOWERS, PJ ;

PAJAYAKRIT, A ;

HOLT, AGJ .

IEE PROCEEDINGS-G CIRCUITS DEVICES AND SYSTEMS, 1987, 134 (02) :57-66

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