Prevention of plasma-induced damage on thin gate oxides in BEOL sub-half micron CMOS processing

A comparison is made of several plasma-induced damage (PID) measurement techniques. A novel PID mechanism using high-density plasma (HDP) inter-metal dielectric (IMD) deposition is proposed. The results of a design of experiment (DOE) on Ar pre-clean minimizing PID are presented. For HDP oxide deposition, the plasma damage is minimal, assuring minimal exposure time of the metal line to the plasma using a maximal deposition to sputter ratio. This process induces less PID than classic SOG processing. Ar pre-clean induces minimal plasma damage using minimal process time, high ion energy and high plasma power. For metal etching, an HDP etch is compared to a reactive ion etch, and the impact of the individual process steps are identified by specialized antenna structures. The measurement results of charge pumping, breakdown voltage and gate oxide leakage correlate very well. On metal etching, the reactive ion etching induces less plasma damage than HDP etching. For both reactors, PID is induced only in the metal over-etch step.