A low-power monolithic CMOS transceiver for 802.11b wireless LANs

被引：0

作者：

Li Weinan ^{[1
]}

Xia Lingli ^{[1
]}

Zheng Yongzheng ^{[1
]}

Huang Yumei ^{[1
]}

Hong Zhiliang ^{[1
]}

机构：

[1] Fudan Univ, State Key Lab ASIC & Syst, Shanghai 201203, Peoples R China

来源：

JOURNAL OF SEMICONDUCTORS | 2009年 / 30卷 / 01期

基金：

中国国家自然科学基金;

关键词：

WLAN; direct-conversion; low power; RF CMOS; transceiver;

D O I：

10.1088/1674-4926/30/1/015007

中图分类号：

O469 [凝聚态物理学];

学科分类号：

070205 ;

摘要：

A single-chip low-power transceiver IC operating in the 2.4 GHz ISM band is presented. Designed in 0.18 mu m CMOS, the transceiver system employs direct-conversion architecture for both the receiver and transmitter to realize a fully integrated wireless LAN product. A sigma-delta (Sigma Delta) fractional-N frequency synthesizer provides on-chip quadrature local oscillator frequency. Measurement results show that the receiver achieves a maximum gain of 81 dB and a noise figure of 8.2 dB, the transmitter has maximum output power of -3.4 dBm and RMS EVM of 6.8%. Power dissipation of the transceiver is 74 mW in the receiving mode and 81 mW in the transmitting mode under a supply voltage of 1.8 V, including 30 mW consumed by the frequency synthesizer. The total chip area with pads is 2.7 x 4.2 mm(2).

引用

页数：7