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A LOW-POWER 12-B ANALOG-TO-DIGITAL CONVERTER WITH ON-CHIP PRECISION TRIMMING
被引：0
作者：
DEWIT, M
TAN, KS
HESTER, RK
机构：
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D O I：
暂无
中图分类号：
TM [电工技术];
TN [电子技术、通信技术];
学科分类号：
0808 ;
0809 ;
摘要：
The design and performance of a 12-b charge redistribution analog-to-digital converter (ADC) is described. The architecture is chosen to minimize power dissipation. Die area is minimized by a modified self-calibration algorithm and non-volatile memory based on polysilicon fuses. The ADC is fabricated in a I-mum CMOS process. It converts at a 200-kHz rate with a power dissipation of 10 mW.
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页码：795 / 801
页数：7
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